Hardware & Technology Comparisons

Since the early 1990's, the PCI (Peripheral Component Interconnect) bus has become the I/O backbone of nearly every computing platform. PCI originally operated at 33 MHz with a 32-bit wide path, delivering a peak theoretical bandwidth of 133 megabytes per second (MB/sec). Revisions have increased the speed to 66 MHz at 64-bits. Higher-bandwidth PCI derivatives and alternatives have evolved over time, including AGP, AMD's HyperTransport, and PCI-X.

PCI-X is an extension of the 32-bit PCI bus to 64-bits, with an increase in frequency from 33/66 MHz up to 133 MHz. The PCI-X 2.0 specification could raise the bus to 266 MHz - 533 MHz, with correspondingly higher throughput speeds. Like PCI, PCI-X is a shared, parallel bus.

PCI Express is a scalable, high-speed, serial I/O bus that maintains backward compatibility with PCI applications and drivers. PCI Express reflects an industry trend to replace legacy shared parallel buses with high-speed point-to-point serial buses PCI Express could eventually replace almost all existing internal buses, including AGP and PCI.

The bandwidth of a PCI Express link can be scaled by adding signal pairs to form multiple lanes between the two devices. The specification supports x1, x4, x8, and x16 lane widths and stripes the byte data across the links accordingly. The basic "x1" link has a peak raw bandwidth of 2.5 Gbps. Because the bus is bidirectional, the effective raw data transfer rate is 5 Gbps.